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×Sacramento, California
VHDL and Verilog Hardware Description Languages are studied and used on the following advanced level logic design topics: synchronous state machines, asynchronous state machines, metastability, hazards, races, testability, boundary scan, scan chains, and built-in self-tests. Commercial Electronic Design Automation (EDA) toolsets are used to synthesize lab projects containing a hierarchy of modules into Field Programmable Gate Arrays (FPGAs). Post synthesis simulations by these same tools verify the design before implementation on rapid prototyping boards in the lab.
Units: 4.0