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California State University-Sacramento Course Info

Sacramento, California

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Course Info

Search for courses by clicking on letters of the alphabet or by using a search bar. Explore course description, number of credits required and course sequences to satisfy graduation requirements.


CPE 274

Advanced Timing Analysis

Timing analysis of Application Specific Integrated Circuit (ASIC) designs: Topics include ASIC design methodology, static timing analysis, timing design constraints, design reports, clock timing issues, timing exceptions, operating conditions, hierarchical analysis, analyzing designs with asynchronous logic, performance measurement and power issues.

Units: 3.0

Prerequisites:
CPE 273 - Hierarchical Digital Design Methodology
and
CSC 273 - Hierarchical Digital Design Methodology
and
EEE 273 - Hierarchical Digital Design Methodology