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California State University-Sacramento Course Info

Sacramento, California

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Course Info

Search for courses by clicking on letters of the alphabet or by using a search bar. Explore course description, number of credits required and course sequences to satisfy graduation requirements.


CSC 242

Computer-Aided Systems Design and Verification

Design and verification methodology using hardware description and verification languages (HDVLs). Advances in IC chip design; introduction to HDVLs such as System Verilog; HDVL language basics including data types, arrays, structures, unions, procedural blocks, tasks, functions, and interface concepts; design hierarchy; verification planning and productivity; verification infrastructure; guidelines for efficient verification of large designs; assertion-based verification; comprehensive computer-related design projects.

Units: 3.0

Prerequisites:
CSC 273 - Hierarchical Digital Design Methodology
or
EEE 273 - Hierarchical Digital Design Methodology
or
CSC 205 - Computer Systems Structure